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authorAshish Mhetre <[email protected]>2022-04-26 13:08:26 +0530
committerThierry Reding <[email protected]>2022-04-29 10:32:09 +0200
commite2ab93e59bc3c029b61a7091825f193f1a66a1a1 (patch)
tree640184193fac40c320b47d0108e573eff7fd8a7a /tools/perf/scripts/python/check-perf-trace.py
parent3123109284176b1532874591f7c81f3837bbdc17 (diff)
dt-bindings: memory: tegra: Update validation for reg and reg-names
From Tegra186 onwards, memory controller support multiple channels. "reg" items are updated with address and size of these channels. Tegra186 has overall 5 memory controller channels. Tegra194 and Tegra234 have overall 17 memory controller channels each. There is one "reg" entry for memory controller stream-ID registers. So update the "reg" property's "minItems" and "maxItems" accordingly in the Tegra186 devicetree documentation. Also update validation for "reg-names" added for these corresponding "reg" items. ABI change due to new bindings is intended but backward compatibility is preserved in driver. Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Ashish Mhetre <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
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