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authorVladimir Oltean <[email protected]>2022-08-18 14:54:51 +0300
committerJakub Kicinski <[email protected]>2022-08-22 17:45:45 -0700
commitb237676039d9f5f3a2a75bc258c3723940f697df (patch)
tree00329773ce7575cac8b2288f7ead4d93721b7a99 /tools/perf/scripts/python/check-perf-trace.py
parent704438dd4f030c1b3d28a2a9c8f182c32d9b6bc4 (diff)
dt-bindings: net: dsa: xrs700x: add missing CPU port phy-mode to example
Judging by xrs700x_phylink_get_caps(), I deduce that this switch supports the RGMII modes on port 3, so state this phy-mode in the example, such that users are encouraged to not rely on avoiding phylink for this port. Signed-off-by: Vladimir Oltean <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Jakub Kicinski <[email protected]>
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