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| author | Tomi Valkeinen <[email protected]> | 2022-04-29 16:56:38 +0530 |
|---|---|---|
| committer | Vignesh Raghavendra <[email protected]> | 2022-05-05 22:45:16 +0530 |
| commit | 92c996f4ceabd5780bb7678138267db0a1e1a00e (patch) | |
| tree | 9d13adfb79f4dcc09d52d4a1e5d6ba0a77d5e80b /tools/perf/scripts/python/check-perf-trace.py | |
| parent | c024c46fe13bb9e9a70d044fd2d63dbee82bbb59 (diff) | |
arm64: dts: ti: k3-j721e-*: add DP & DP PHY
Add DT nodes for DisplayPort and DisplayPort PHY. The DP is Cadence MHDP
8546 and the PHY is a Cadence Torrent PHY with TI WIZ wrapper.
Also add the required phy link nodes in the board dts files.
A slight irregularity in the bindings is the DPTX PHY register block,
which is in the MHDP IP, but is needed and mapped by the PHY.
Signed-off-by: Tomi Valkeinen <[email protected]>
Signed-off-by: Rahul T R <[email protected]>
Signed-off-by: Vignesh Raghavendra <[email protected]>
Reviewed-by: Aradhya Bhatia <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions