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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-11-27 03:10:53 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-01-22 21:12:42 +0900 |
| commit | 8f32b8124a99a8f7a433d50ca041a75f096ffc7b (patch) | |
| tree | ee27b395649478ce26fb777db2bd4b0849651604 /tools/perf/scripts/python/check-perf-trace.py | |
| parent | 7ce7d89f48834cefece7804d38fc5d85382edf77 (diff) | |
arm64: dts: uniphier: add SD-ctrl node for LD11 SoC
The LD11 SoC is equipped with SD-ctrl (0x59810000) as well as
MIO-ctrl (0x5b3e0000). The SD-ctrl block on this SoC has just
one register for controlling RST_n pin of the eMMC device.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions