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authorJohan Jonker <[email protected]>2022-03-24 13:01:22 +0100
committerHeiko Stuebner <[email protected]>2022-04-10 18:38:49 +0200
commit8a1b63b14fe7df811439235606c146faa15faa52 (patch)
treea46467349b0b2843598e995ae0bdc9296d8100ad /tools/perf/scripts/python/check-perf-trace.py
parent3123109284176b1532874591f7c81f3837bbdc17 (diff)
dt-bindings: soc: rockchip: add naneng combo phy register compatible
Add Naneng combo phy register compatible. Signed-off-by: Johan Jonker <[email protected]> Signed-off-by: Yifeng Zhao <[email protected]> Acked-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
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