diff options
| author | Thierry Reding <treding@nvidia.com> | 2015-05-04 16:44:29 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2015-07-16 10:38:31 +0200 |
| commit | 82df0e5e78d956ea3552f7315a4d559f657047da (patch) | |
| tree | b01c7e1679e07578760b810bb91bc03b4503f93a /tools/perf/scripts/python/check-perf-trace.py | |
| parent | b23083a9c6829675d367b4f06a64d74ead82eb14 (diff) | |
soc/tegra: fuse: Add spare bit offset for Tegra124
The offset of the first spare bit register on Tegra124 is 0x300, but
account for the fixed offset of 0x100 in the fuse accessor.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions