aboutsummaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/check-perf-trace.py
diff options
context:
space:
mode:
authorNick Hawkins <nick.hawkins@hpe.com>2022-05-18 14:38:37 +0100
committerRussell King (Oracle) <rmk+kernel@armlinux.org.uk>2022-05-20 12:33:48 +0100
commit8294fec1cab7ae6153525eb68401ed5905921371 (patch)
tree033303ff64cb5ad496c0b746267c2110c4c0f31b /tools/perf/scripts/python/check-perf-trace.py
parentad12c2f1587c6ec9b52ff226f438955bfae6ad89 (diff)
ARM: 9206/1: A9: Add ARM ERRATA 764319 workaround (Updated)
Enable the workaround for the 764319 Cortex A-9 erratum. CP14 read accesses to the DBGPRSR and DBGOSLSR registers generate an unexpected Undefined Instruction exception when the DBGSWENABLE external pin is set to 0, even when the CP14 accesses are performed from a privileged mode. The work around catches the exception in a way the kernel does not stop execution with the use of undef_hook. This has been found to effect the HPE GXP SoC. Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions