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| author | abdoulaye berthe <abdoulaye.berthe@amd.com> | 2019-08-13 09:24:10 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-10-17 16:24:34 -0400 |
| commit | 8276dd871fd4240037cffb3904eda2dfe028fd85 (patch) | |
| tree | 9431076a246b832d037aa4bf8bb06de6aa893a7d /tools/perf/scripts/python/check-perf-trace.py | |
| parent | 64c5cc93677c115fdb4c3860a54466c836a1591b (diff) | |
drm/amd/display: update register field access mechanism
1-add timeout length and multiplier fields to aux_control1 register
2-update access mechanism from macro constructed name to uint32_t
defined addresses.
3-define registers and field per asic family
Signed-off-by: abdoulaye berthe <abdoulaye.berthe@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions