diff options
| author | Biju Das <biju.das.jz@bp.renesas.com> | 2024-02-13 18:12:33 +0000 |
|---|---|---|
| committer | Hans Verkuil <hverkuil-cisco@xs4all.nl> | 2024-02-15 10:57:54 +0100 |
| commit | 6bcff5f958e45a21f74d140c58e061999e97cd50 (patch) | |
| tree | 173c5a87b244aad49ec21a1b7e8e4eb56a452dcb /tools/perf/scripts/python/check-perf-trace.py | |
| parent | fdc7bd5b3a64277c9427576a596df572d563dc3d (diff) | |
media: platform: rzg2l-cru: rzg2l-video: Fix start reception procedure
As per section 35.3.1 Starting Reception for the MIPI CSI-2 Input on the
latest hardware manual (R01UH0914EJ0145 Rev.1.45) we need to supply all
the clocks and then release the CRU resets. Currently we are releasing
the resets and then supplying the clocks. So, fix the start reception
procedure.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20240213181233.242316-6-biju.das.jz@bp.renesas.com
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions