diff options
| author | Joakim Zhang <[email protected]> | 2021-06-08 11:15:35 +0800 |
|---|---|---|
| committer | David S. Miller <[email protected]> | 2021-06-08 11:41:24 -0700 |
| commit | 6813cc8cfdaf401476e1a007cec8ae338cefa573 (patch) | |
| tree | 1c2c1b0943586e65847584348ff36080c61648d6 /tools/perf/scripts/python/check-perf-trace.py | |
| parent | d90db36a9e748c9d886df15f5e17b341f0e5bcd5 (diff) | |
net: phy: realtek: add delay to fix RXC generation issue
PHY will delay about 11.5ms to generate RXC clock when switching from
power down to normal operation. Read/write registers would also cause RXC
become unstable and stop for a while during this process. Realtek engineer
suggests 15ms or more delay can workaround this issue.
Signed-off-by: Joakim Zhang <[email protected]>
Signed-off-by: David S. Miller <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions