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| author | Puranjay Mohan <[email protected]> | 2024-04-04 11:42:02 +0000 |
|---|---|---|
| committer | Daniel Borkmann <[email protected]> | 2024-04-04 16:48:10 +0200 |
| commit | 633a6e01d1a20b24a16899094c249a8cb2aad4b2 (patch) | |
| tree | 8dee43335ab942606e838b9e70beb506ec85ace1 /tools/perf/scripts/python/check-perf-trace.py | |
| parent | af682b767a41772499f8e54ca7d7e1deb3395f44 (diff) | |
bpf, riscv: Implement PROBE_MEM32 pseudo instructions
Add support for [LDX | STX | ST], PROBE_MEM32, [B | H | W | DW]
instructions. They are similar to PROBE_MEM instructions with the
following differences:
- PROBE_MEM32 supports store.
- PROBE_MEM32 relies on the verifier to clear upper 32-bit of the
src/dst register
- PROBE_MEM32 adds 64-bit kern_vm_start address (which is stored in S7
in the prologue). Due to bpf_arena constructions such S7 + reg +
off16 access is guaranteed to be within arena virtual range, so no
address check at run-time.
- S11 is a free callee-saved register, so it is used to store kern_vm_start
- PROBE_MEM32 allows STX and ST. If they fault the store is a nop. When
LDX faults the destination register is zeroed.
To support these on riscv, we do tmp = S7 + src/dst reg and then use
tmp2 as the new src/dst register. This allows us to reuse most of the
code for normal [LDX | STX | ST].
Signed-off-by: Puranjay Mohan <[email protected]>
Signed-off-by: Daniel Borkmann <[email protected]>
Tested-by: Björn Töpel <[email protected]>
Tested-by: Pu Lehui <[email protected]>
Reviewed-by: Pu Lehui <[email protected]>
Acked-by: Björn Töpel <[email protected]>
Link: https://lore.kernel.org/bpf/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions