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authorClément Léger <[email protected]>2022-06-24 16:39:58 +0200
committerDavid S. Miller <[email protected]>2022-06-27 11:37:55 +0100
commit3f5261f1c2a8d7b178f9f65c6dda92523329486e (patch)
treee2c76cfab1a9e844ee4d036f1802a3749b556679 /tools/perf/scripts/python/check-perf-trace.py
parent066c3bd358355185d9313358281fe03113c0a9ad (diff)
ARM: dts: r9a06g032: describe GMAC2
RZ/N1 SoC includes two MAC named GMACx that are compatible with the "snps,dwmac" driver. GMAC1 is connected directly to the MII converter port 1. GMAC2 however can be used as the MAC for the switch CPU management port or can be muxed to be connected directly to the MII converter port 2. This commit add description for the GMAC2 which will be used by the switch description. Signed-off-by: Clément Léger <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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