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author | Vandita Kulkarni <[email protected]> | 2019-05-02 20:40:59 +0530 |
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committer | Jani Nikula <[email protected]> | 2019-05-14 10:36:23 +0300 |
commit | 3c23ed13112cbce6a31b30224582169c81f1c91a (patch) | |
tree | 22062e94dab8dd7823348c7db1ae4aa1a8696799 /tools/perf/scripts/python/check-perf-trace.py | |
parent | cdd075960215e057f29f4f758be661e2223ba0f6 (diff) |
drm/i915: Fix the pipe state timing mismatch warnings
Adjust the get transcoder timings for mipi dsi as per the
set timing calculations.
v2: Use the existing intel_get_pipe_timings and do the dsi
specific adjustments in the encoder get_config hook.(Ville, Jani)
v3: Exclude VBLANK and HBLANK registers for dsi transcoder.
v4: Fix the incomplete conditional logic.
Signed-off-by: Vandita Kulkarni <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions