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| author | Marek Szyprowski <[email protected]> | 2009-11-19 11:30:30 +0100 |
|---|---|---|
| committer | Russell King <[email protected]> | 2009-11-24 10:06:26 +0000 |
| commit | 394168389c5770accf1d255fdfe45846ec121585 (patch) | |
| tree | 9f5493e46b94a1aed058d121091ea8e982a95d11 /tools/perf/scripts/python/check-perf-trace.py | |
| parent | b43149c168ce4069ce8828b1ceb8f7eb42bc4b82 (diff) | |
ARM: 5791/1: ARM: MM: use 64bytes of L1 cache on plat S5PC1xx
Samsung S5PC1xx SoCs are based on ARM Coretex8, which has 64 bytes of L1
cache line size. Enable proper handling of L1 cache on these SoCs.
Signed-off-by: Kyungmin Park <[email protected]>
Signed-off-by: Marek Szyprowski <[email protected]>
Signed-off-by: Russell King <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions