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authorAndrew Bresticker <[email protected]>2013-09-25 14:12:49 -0700
committerTomasz Figa <[email protected]>2014-01-08 18:02:42 +0100
commit35399dda011b515120e0c39463ac32f0cac75c6a (patch)
treed3117a0bf64baa1b1841570ed61af2cbd25f3cf0 /tools/perf/scripts/python/check-perf-trace.py
parent547f33509ccc6e016df02600d377778b75e26a7b (diff)
clk: exynos5250: add clock ID for div_pcm0
There is no gate for the PCM clock input to the AudioSS block, so the parent of sclk_pcm is div_pcm0. Add a clock ID for it so that we can reference it in device trees. Signed-off-by: Andrew Bresticker <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Acked-by: Mike Turquette <[email protected]> Acked-by: Kukjin Kim <[email protected]> Signed-off-by: Tomasz Figa <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
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