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| author | Paweł Jarosz <[email protected]> | 2016-10-14 14:16:54 +0200 |
|---|---|---|
| committer | Heiko Stuebner <[email protected]> | 2016-10-21 15:42:53 +0200 |
| commit | 305b54750d6bd4f36535b6b80c6f5bd6fb519e40 (patch) | |
| tree | 9ad9dc72adc7a6e05f92b2475690cc629ee05e6e /tools/perf/scripts/python/check-perf-trace.py | |
| parent | 30522550d029f77c349f550375a70dbdc9ab7ca9 (diff) | |
ARM: dts: rockchip: initialize rk3066 PLL clock rate
Initialize PLL, cpu bus and peripherial bus rate while kernel init.
No other module does than.
This gives us performance boost observable for example in mmc transfers.
Signed-off-by: Paweł Jarosz <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions