diff options
author | Richard Zhu <[email protected]> | 2022-10-13 09:46:59 +0800 |
---|---|---|
committer | Vinod Koul <[email protected]> | 2022-10-17 11:01:02 +0530 |
commit | 25caed3dcadacd0443dce4fb820e4a33029bba40 (patch) | |
tree | 215c1b17a5f90b7fbf7b5c9e7ec6378fc921b8ed /tools/perf/scripts/python/check-perf-trace.py | |
parent | e27ecef8a8ccc13c54df54f5d100aa608de4c306 (diff) |
dt-binding: phy: Add i.MX8MP PCIe PHY binding
Add i.MX8MP PCIe PHY binding.
On i.MX8MM, the initialized default value of PERST bit(BIT3) of
SRC_PCIEPHY_RCR is 1b'1.
But i.MX8MP has one inversed default value 1b'0 of PERST bit.
And the PERST bit should be kept 1b'1 after power and clocks are stable.
So add one more PERST explicitly for i.MX8MP PCIe PHY.
Signed-off-by: Richard Zhu <[email protected]>
Tested-by: Marek Vasut <[email protected]>
Tested-by: Richard Leitner <[email protected]>
Tested-by: Alexander Stein <[email protected]>
Reviewed-by: Lucas Stach <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions