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authorLucas De Marchi <[email protected]>2020-10-14 12:19:29 -0700
committerLucas De Marchi <[email protected]>2020-10-15 14:14:29 -0700
commit240abb3c76ff4b469f91a753adb8426b77cab914 (patch)
tree67d4fec1c71e770a7a78723a888cf4907fae6017 /tools/perf/scripts/python/check-perf-trace.py
parent62277f33e9c16d34f07bc18b8146c4befa92cb69 (diff)
drm/i915/dg1: Add DG1 power wells
TGL power wells can be re-used for DG1 with the exception of the fake power well for TC_COLD. v2: use logic to skip power wells while copying instead of duplicating the definition of TGL power wells (Matt Roper) Bspec: 49182 Cc: Matt Roper <[email protected]> Cc: Anshuman Gupta <[email protected]> Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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