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| author | Xiaolong Zhang <xiaolong.zhang@unisoc.com> | 2020-03-04 15:27:24 +0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-03-24 19:03:56 -0700 |
| commit | 187e5cd2d133771e978e7e4ea6aa684dfd1ce6ab (patch) | |
| tree | cb09afa67e7e7b1743cd51b76cedad563fc59713 /tools/perf/scripts/python/check-perf-trace.py | |
| parent | bb6d3fb354c5ee8d6bde2d576eb7220ea09862b9 (diff) | |
clk: sprd: add gate for pll clocks
Some sprd's gate clocks are used to the switch of pll, which
need to wait a certain time for stable after being enabled.
Signed-off-by: Xiaolong Zhang <xiaolong.zhang@unisoc.com>
Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Link: https://lkml.kernel.org/r/20200304072730.9193-2-zhang.lyra@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions