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authorEric Bernstein <[email protected]>2018-05-14 17:01:00 -0400
committerAlex Deucher <[email protected]>2018-06-15 12:20:27 -0500
commit0b126112e90a96907aa14c39374fc7bfdbba131a (patch)
tree3a6a2e3704fb79d088650cfbef67341058bd4140 /tools/perf/scripts/python/check-perf-trace.py
parent8de94233f4cdcd5b3065fa9b9af3edc10874a120 (diff)
drm/amd/display: DP YCbCr 4:2:0 support
Update MSA MISC1 bit 6 programming to handle YCbCr 4:2:0 and BT2020 cases. Signed-off-by: Eric Bernstein <[email protected]> Reviewed-by: Hersen Wu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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