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| author | Anshuman Khandual <anshuman.khandual@arm.com> | 2020-05-19 15:10:44 +0530 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2020-05-21 15:47:11 +0100 |
| commit | 0ae43a99fe91399d9e5b2d0756e16e97b21cc187 (patch) | |
| tree | 4309295ebf082227905b53f0ec1dc48d72ad9302 /tools/perf/scripts/python/check-perf-trace.py | |
| parent | 152accf8476f0447de57d9ffaf0c5ab578ed3d40 (diff) | |
arm64/cpufeature: Add remaining feature bits in ID_PFR0 register
Enable DIT and CSV2 feature bits in ID_PFR0 register as per ARM DDI 0487F.a
specification. Except RAS and AMU, all other feature bits are now enabled.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/1589881254-10082-8-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions