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| author | Sergio Paracuellos <[email protected]> | 2021-09-25 22:32:21 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <[email protected]> | 2021-10-05 12:36:25 +0200 |
| commit | ebe7e788ee7270cfe43584e99f11b00d1e4bbb3f (patch) | |
| tree | a6dfec8a9ba3f3dbc0d3eb8dc30763be5c66130b /tools/perf/scripts/python/bin | |
| parent | df86c6e27a80dec09ba854eaa5ccfffc6dc9d289 (diff) | |
MIPS: ralink: set PCI_IOBASE to 'mips_io_port_base'
By default MIPS architecture use function 'set_io_port_base()' to set the
virtual address of the first IO port. This function at the end sets variable
'mips_io_port_base' with the desired address. To align things and allow
to change first IO port location address for PCI, set PCI_IOBASE definition
as 'mips_io_port_base'.
Fixes: 222b27713d7f ("MIPS: ralink: Define PCI_IOBASE")
Acked-by: Arnd Bergmann <[email protected]>
Acked-by: Thomas Bogendoerfer <[email protected]>
Signed-off-by: Sergio Paracuellos <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions