diff options
| author | Guennadi Liakhovetski <[email protected]> | 2009-03-31 03:44:22 -0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <[email protected]> | 2009-04-06 21:43:48 -0300 |
| commit | e951cbf20cdc7c55c9c752d28411d956675befd6 (patch) | |
| tree | 733210c5d359d8828ce2d0a600a5bbcd85242a2e /tools/perf/scripts/python/bin | |
| parent | eee1663fa71e32b146a584cb9a7c22bb6302ec14 (diff) | |
V4L/DVB (11326): mt9m001: fix advertised pixel clock polarity
MT9M001 datasheet says, that the data is ready on the falling edge of the pixel
clock, but the driver wrongly sets the SOCAM_PCLK_SAMPLE_RISING flag. Changing
this doesn't seem to produce any visible difference, still, it is better to
comply to the datasheet.
Reported-by: Sascha Oppermann <[email protected]>
Signed-off-by: Guennadi Liakhovetski <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions