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| author | Jonathan Cameron <[email protected]> | 2022-05-08 18:56:07 +0100 |
|---|---|---|
| committer | Jonathan Cameron <[email protected]> | 2022-06-14 11:53:14 +0100 |
| commit | e770f78036ce4327caf285873f4b20564a8b4f0f (patch) | |
| tree | 18f6e62a7a4ceed2f010eee9f5957cbff590357f /tools/perf/scripts/python/bin | |
| parent | 9d7019e43ee67a48cef63f8f23f002233064d390 (diff) | |
iio: adc: mcp320x: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Worth noting the fixes tag refers to the same issue being observed
on a platform that probably had only 64 byte cachelines.
Fixes: 0e81bc99a082 ("iio: mcp320x: Fix occasional incorrect readings")
Signed-off-by: Jonathan Cameron <[email protected]>
Cc: Michael Welling <[email protected]>
Acked-by: Nuno Sá <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions