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authorVivien Didelot <[email protected]>2017-03-30 17:37:11 -0400
committerDavid S. Miller <[email protected]>2017-04-01 12:22:57 -0700
commite5887a2a110947cdd936fcc8722d8f08f3e8e392 (patch)
tree984346e6c4f5f572f6b550ff0a1e145ea28510ab /tools/perf/scripts/python/bin
parent73b1204d070d2970749beb3fa3ca6e639dc7a3b6 (diff)
net: dsa: mv88e6xxx: rework in-chip bridging
All ports -- internal and external, for chips featuring a PVT -- have a mask restricting to which internal ports a frame is allowed to egress. Now that DSA exposes the number of ports and their bridge devices, it is possible to extract the code generating the VLAN map and make it generic so that it can be shared later with the cross-chip bridging code. Signed-off-by: Vivien Didelot <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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