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| author | Ville Syrjälä <[email protected]> | 2014-06-28 02:03:59 +0300 |
|---|---|---|
| committer | Daniel Vetter <[email protected]> | 2014-08-08 17:43:42 +0200 |
| commit | d17ec4ced6c0907f80f51677a44236da94ecd92d (patch) | |
| tree | feb8a6188667c7a62edef67e2d11fab873a482bf /tools/perf/scripts/python/bin | |
| parent | d49a340d6eb6de45c1a886b71469d110f2dbb57b (diff) | |
drm/i915: Leave DPLL ref clocks on
We enable the DPLL refclock already when bringing up the cmnlane power
well, so also leave it on when otherwise disabling the DPLL.
Signed-off-by: Ville Syrjälä <[email protected]>
Reviewed-by: Jesse Barnes <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions