diff options
| author | Daniel Baluta <[email protected]> | 2019-08-06 18:12:11 +0300 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2019-08-07 14:26:04 +0100 |
| commit | b84f50b0fcb497a62068926fca793d2d213c7dbd (patch) | |
| tree | 1995837cfafdd3efa010a995866c2a575a28dc54 /tools/perf/scripts/python/bin | |
| parent | 5f0ac20ed6db1d6da2eea8b862cf3d54fdfb5830 (diff) | |
ASoC: fsl_sai: Update Tx/Rx channel enable mask
Tx channel enable (TCE) / Rx channel enable (RCE) bits
enable corresponding data channel for Tx/Rx operation.
Because SAI supports up the 8 channels TCE/RCE occupy
up the 8 bits inside TCR3/RCR3 registers we need to extend
the mask to reflect this.
Signed-off-by: Daniel Baluta <[email protected]>
Acked-by: Nicolin Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions