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| author | Madhumitha Tolakanahalli Pradeep <[email protected]> | 2023-04-21 20:25:34 +0200 |
|---|---|---|
| committer | Andi Shyti <[email protected]> | 2023-04-23 02:11:21 +0200 |
| commit | b76c0deef6273609c02ed5053209f6397cd1b0fb (patch) | |
| tree | 809d4600b1e64838d3e484898fbefaa0233c9b2d /tools/perf/scripts/python/bin | |
| parent | 7787af256504b13f0ab6c311ed7870a895b762b8 (diff) | |
drm/i915/mtl: Define MOCS and PAT tables for MTL
On MTL, GT can no longer allocate on LLC - only the CPU can.
This, along with programming new register bits that MTL
requires calls for a MOCS/PAT table update.
Also the PAT index registers are multicasted for primary GT,
and there is an address jump from index 7 to 8. This patch
makes sure that these registers are programmed in the proper
way.
BSpec: 44509, 45101, 44235
Cc: Matt Roper <[email protected]>
Cc: Lucas De Marchi <[email protected]>
Signed-off-by: Madhumitha Tolakanahalli Pradeep <[email protected]>
Signed-off-by: Aravind Iddamsetty <[email protected]>
Signed-off-by: Nirmoy Das <[email protected]>
Signed-off-by: Fei Yang <[email protected]>
Reviewed-by: Andrzej Hajda <[email protected]>
Reviewed-by: Nirmoy Das <[email protected]>
Reviewed-by: Andi Shyti <[email protected]>
Signed-off-by: Andi Shyti <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/bin')
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