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authorMika Kahola <[email protected]>2015-08-18 14:36:59 +0300
committerDaniel Vetter <[email protected]>2015-08-26 10:28:54 +0200
commitadafdc6fcb66ea6541a88884ec522273f857c145 (patch)
treee24fcbf16ae67547137a4eeb8892d51c78a0871b /tools/perf/scripts/python/bin
parent65d64cc5bb7aee1f5a8d6717f4d421623c58ea30 (diff)
drm/i915: Store max dotclock
Store max dotclock into dev_priv structure so we are able to filter out the modes that are not supported by our platforms. V2: - limit the max dot clock frequency to max CD clock frequency for the gen9 and above - limit the max dot clock frequency to 90% of the max CD clock frequency for the older gens - for Cherryview the max dot clock frequency is limited to 95% of the max CD clock frequency - for gen2 and gen3 the max dot clock limit is set to 90% of the 2X max CD clock frequency V3: - max_dotclk variable renamed as max_dotclk_freq in i915_drv.h - in intel_compute_max_dotclk() the rounding method changed from round up to round down when computing max dotclock V4: - Haswell and Broadwell supports now dot clocks up to max CD clock frequency Signed-off-by: Mika Kahola <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
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