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authorLikun Gao <[email protected]>2022-04-12 16:57:45 -0400
committerAlex Deucher <[email protected]>2022-05-04 10:43:54 -0400
commitaca670e41f9fe52176040553f174d517cbd69da9 (patch)
treef7849140a346ee01cca698324aebfe6200984b87 /tools/perf/scripts/python/bin
parenta76be7bbc3d7213e2e5ef9cbfa397c3ef48fb8b9 (diff)
drm/amdgpu: fix the fw size for sdma
For SDMA, if use the total size of SDMA TH0 and TH1 to allocate fw BO may result to the ucode data overflow when copy ucode to BO as the PAGE alignment. IMU have the same issue. Fix the above issue by alignment the fw size per fw ID. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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