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authorNishanth Menon <[email protected]>2014-04-11 11:21:47 -0500
committerNishanth Menon <[email protected]>2014-05-05 14:33:01 -0500
commit9e224c8ff19e4c4a9c9272171d5a0169d5cb1bef (patch)
tree0fe14e60cea7421c84523de400ce17ba5de11bdc /tools/perf/scripts/python/bin
parentca6a34935c2c95482b901d76116f785ea356412c (diff)
bus: omap_l3_noc: switch over to relaxed variants of readl/writel
Currently we use __raw_readl and writel in this driver. Considering there is no specific need for a memory barrier, replacing writel with endian-neutral writel_relaxed and replacing __raw_readls with the corresponding endian-neutral readl_relaxed allows us to have a standard set of register operations for the driver. While at it, simplify address computation using variables for register. Signed-off-by: Nishanth Menon <[email protected]> Acked-by: Santosh Shilimkar <[email protected]> Acked-by: Felipe Balbi <[email protected]> Acked-by: Peter Ujfalusi <[email protected]> Tested-by: Darren Etheridge <[email protected]> Tested-by: Sekhar Nori <[email protected]>
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