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| author | Sai Prakash Ranjan <[email protected]> | 2021-02-16 15:17:48 +0530 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2021-03-11 20:22:39 -0600 |
| commit | 794d3e309e44c99158d0166b1717f297341cf3ab (patch) | |
| tree | 9b8defe129d5e77e68527d79db4e36ac8dc2a796 /tools/perf/scripts/python/bin | |
| parent | 93138ef5ac923b10f81575d35dbcb83136cbfc40 (diff) | |
arm64: dts: qcom: sm8350: Fix level triggered PMU interrupt polarity
As per interrupt documentation for SM8350 SoC, the polarity
for level triggered PMU interrupt is low, fix this.
Fixes: b7e8f433a673 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC")
Signed-off-by: Sai Prakash Ranjan <[email protected]>
Link: https://lore.kernel.org/r/ca57409198477f7815e32a6a7467dcdc9b93dc4f.1613468366.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions