diff options
| author | Huang Rui <[email protected]> | 2020-12-02 15:28:23 +0800 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2021-01-13 23:48:13 -0500 |
| commit | 743538838c6a6b368ef58cad9528b15615e4ec33 (patch) | |
| tree | 3490e001358ad49c43a4e31630c3eca746392a0d /tools/perf/scripts/python/bin | |
| parent | b6903089a5ab74e8bcae963d5ca60b0005b75c05 (diff) | |
drm/amdgpu: revise the mode2 reset for vangogh
PCIE MMIO bar needs to be restored firstly after the reset event
triggers. So it's unable to access the registers to wait for response
from SMU. Becasue the value of mmMP1_SMN_C2PMSG_90 is invalid at that
moment.
Signed-off-by: Huang Rui <[email protected]>
Acked-by: Evan Quan <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions