diff options
| author | Pierre-Louis Bossart <[email protected]> | 2023-08-02 10:36:16 -0500 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2023-08-07 14:32:21 +0100 |
| commit | 6ab18105029ca3d739dd4c5c18638c7c6d568bbb (patch) | |
| tree | 68b4b8e2ecbd688a89bdf3ac8e1e78930c5572e1 /tools/perf/scripts/python/bin | |
| parent | 49ae74abc76b2d9be4777e7ac833674fa4749071 (diff) | |
ASoC: rt5682-sdw: make regmap cache-only in probe
The RT5682 needs specific attention: there are two regmap in
rt5682_priv struct, one is sdw_regmap which is for IO transfer, and
the other is used for registers control.
We need to set both regmaps when we set cache only. Because if we set
rt5682->sdw_regmap only, rt5682->regmap won't set/get the right value
when it call regmap_write/read(rt5682->sdw_regmap, ...). If we set
rt5682->regmap only, regmap_write(rt5682->sdw_regmap, ...) is used
in rt5682_clock_config which will be called by the ..bus_config ops.
Signed-off-by: Bard Liao <[email protected]>
Signed-off-by: Pierre-Louis Bossart <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions