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| author | Paul Burton <[email protected]> | 2019-10-01 21:53:37 +0000 |
|---|---|---|
| committer | Paul Burton <[email protected]> | 2019-10-07 09:43:00 -0700 |
| commit | 6a57d2d1e7c3ac7f47d8c51bddd9082fe2fb485b (patch) | |
| tree | 789103613e6583abba4109f4e01a6c9ac3724358 /tools/perf/scripts/python/bin | |
| parent | 9026737703aeee35702a0f990811e9202469c7b4 (diff) | |
MIPS: cmpxchg: Emit Loongson3 sync workarounds within asm
Generate the sync instructions required to workaround Loongson3 LL/SC
errata within inline asm blocks, which feels a little safer than doing
it from C where strictly speaking the compiler would be well within its
rights to insert a memory access between the separate asm statements we
previously had, containing sync & ll instructions respectively.
Signed-off-by: Paul Burton <[email protected]>
Cc: [email protected]
Cc: Huacai Chen <[email protected]>
Cc: Jiaxun Yang <[email protected]>
Cc: [email protected]
Diffstat (limited to 'tools/perf/scripts/python/bin')
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