aboutsummaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/bin
diff options
context:
space:
mode:
authorAlisa-Dariana Roman <[email protected]>2024-07-18 00:25:33 +0300
committerJonathan Cameron <[email protected]>2024-08-03 10:13:39 +0100
commit51b6a716890750187ed7da8138cbb296f9141457 (patch)
treeb3fd5e443af9353ef8091315c1ab4cbbb2f24a74 /tools/perf/scripts/python/bin
parentfe2e79695967297d022543c1a8df3c7c9cf62266 (diff)
iio: adc: ad7192: Update clock config
There are actually 4 configuration modes of clock source for AD719X devices. Either a crystal can be attached externally between MCLK1 and MCLK2 pins, or an external CMOS-compatible clock can drive the MCLK2 pin. The other 2 modes make use of the 4.92MHz internal clock. Undocumented properties adi,int-clock-output-enable and adi,clock-xtal still supported for backward compatibility, but their use is highly discouraged. Use cleaner alternative of configuring external clock by using clock names mclk and xtal. Functionality of AD7192_CLK_INT_CO will be implemented in complementary patch by adding clock provider. Signed-off-by: Alisa-Dariana Roman <[email protected]> Reviewed-by: Nuno Sa <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions