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authorImre Deak <[email protected]>2019-11-12 12:46:08 +0200
committerImre Deak <[email protected]>2019-11-13 14:03:15 +0200
commit50a5065f4474c2dbc1f7462b45a32d33d7b48d88 (patch)
tree7464f45806e2e46340f2de7aca491035d1be5160 /tools/perf/scripts/python/bin
parentd670719467ecb3ab6bf39c97e01657a82d458fde (diff)
drm/i915: Fix detection for a CMP-V PCH
According to internal documents I found for CMP PCHs the PCI ID 0xA3C1 belongs to a CMP-V chipset. Based on the same docs the programming of the PCH is compatible with that of KBP. Fix up my previous wrong assumption accordingly using the SPT programming which in turn is the basis for KBP. The original bug reporter verified that this is the correct PCH identification (the only way we'll program valid DDC pin-pair values to the GMBUS register) and the Windows team uses the same identification (that is using the KBP programming model for this PCH). I filed the necessary Bspec update requests (BSpec/33734). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112051 Fixes: 37c92dc303dd ("drm/i915: Add new CNL PCH ID seen on a CML platform") Reported-and-tested-by: Cyrus <[email protected]> Cc: Cyrus <[email protected]> Cc: Timo Aaltonen <[email protected]> Cc: José Roberto de Souza <[email protected]> Signed-off-by: Imre Deak <[email protected]> Reviewed-by: José Roberto de Souza <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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