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| author | Jonathan Cameron <[email protected]> | 2022-05-08 18:56:00 +0100 |
|---|---|---|
| committer | Jonathan Cameron <[email protected]> | 2022-06-14 11:53:13 +0100 |
| commit | 48e4ae96b0b10f93de23b86fd34e573c44e95ab3 (patch) | |
| tree | a1ceaa1a45bce2576a214e2a027eedeb1eb5c75f /tools/perf/scripts/python/bin | |
| parent | 9c6c7eff7d4a53efd4d0818f8664259a1862665a (diff) | |
iio: adc: hi8435: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes: 72aa29ce0a59 ("iio: adc: hi8435: Holt HI-8435 threshold detector")
Signed-off-by: Jonathan Cameron <[email protected]>
Acked-by: Nuno Sá <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/bin')
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