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| author | Ching-Te Ku <[email protected]> | 2020-11-09 16:58:59 +0800 |
|---|---|---|
| committer | Kalle Valo <[email protected]> | 2020-11-10 20:58:08 +0200 |
| commit | 3f3fef5f6a8ff96f1bd7fc65a76fbe4ccc87b14a (patch) | |
| tree | 41349582b73c14db3764e3f9601ad03321e431a2 /tools/perf/scripts/python/bin | |
| parent | dd90fc4630d285db429e393522d7b3844fbf79e9 (diff) | |
rtw88: coex: fixed some wrong register definition and setting
Some register definition and bit definition were incorrect.
e.g. REG_BT_COEX_V2 should be word alignment to meet the coding style.
e.g. set REG_BT_TDMA_TIME[5:0]=0x5,
But the original is to set REG_BT_TDMA_TIME[7:0]=0x5.
This will cause unexpected hardware behavior.
Signed-off-by: Ching-Te Ku <[email protected]>
Signed-off-by: Ping-Ke Shih <[email protected]>
Signed-off-by: Kalle Valo <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions