clk: rockchip: drop CLK_SET_RATE_PARENT from rk3399 fractional dividers

Currently the fractional divider clock time can't handle the
CLK_SET_RATE_PARENT flag. This is because, unlike normal dividers,
there is no clk_divider_bestdiv() function to try speeding up the parent
to see if it helps things.

Eventually someone could try to figure out how to make fractional
dividers able to use CLK_SET_RATE_PARENT, but until they do let's not
confuse the common clock framework (and anyone using it) by setting the
flag.

Signed-off-by: Douglas Anderson <[email protected]>
Signed-off-by: Chris Zhong <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>

0 files changed, 0 insertions, 0 deletions