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authorShaokun Zhang <[email protected]>2017-10-19 19:05:18 +0800
committerWill Deacon <[email protected]>2017-10-19 17:06:34 +0100
commit2940bc4333707a05e69b3ffd737bda0dc0c3004f (patch)
treea9a9bca2aac6ebc0f875e85ecd85c89620cdf134 /tools/perf/scripts/python/bin
parent6ce4ef94195da926245b58311119ed9d52428fdc (diff)
perf: hisi: Add support for HiSilicon SoC L3C PMU driver
This patch adds support for L3C PMU driver in HiSilicon SoC chip, Each L3C has own control, counter and interrupt registers and is an separate PMU. For each L3C PMU, it has 8-programable counters and each counter is free-running. Interrupt is supported to handle counter (48-bits) overflow. Acked-by: Mark Rutland <[email protected]> Reviewed-by: Jonathan Cameron <[email protected]> Signed-off-by: Shaokun Zhang <[email protected]> Signed-off-by: Anurup M <[email protected]> Signed-off-by: Will Deacon <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin')
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