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authorChen-Yu Tsai <[email protected]>2019-04-13 11:32:52 +0100
committerGreg Kroah-Hartman <[email protected]>2019-04-25 19:43:11 +0200
commit273a474ee843fe6f77c3fef365306018bac9c96d (patch)
tree56eb6af8aaa3f9de711f073d060349737644df08 /tools/perf/scripts/python/bin
parent7fa5ad23dbb02fc9832ef303adbca06f425250d5 (diff)
nvmem: sunxi_sid: Read out data in native format
Originally the SID e-fuses were thought to be in big-endian format. Later sources show that they are in fact native or little-endian. The most compelling evidence is the thermal sensor calibration data, which is a set of one to three 16-bit values. In native-endian they are in 16-bit cells with increasing offsets, whereas with big-endian they are in the wrong order, and a gap with no data will show if there are one or three cells. Switch to a native endian representation for the nvmem device. For the H3, the register read-out method was already returning data in native endian. This only affects the other SoCs. Signed-off-by: Chen-Yu Tsai <[email protected]> Acked-by: Maxime Ripard <[email protected]> Signed-off-by: Srinivas Kandagatla <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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