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| author | Athira Rajeev <[email protected]> | 2022-06-10 19:10:51 +0530 |
|---|---|---|
| committer | Michael Ellerman <[email protected]> | 2022-06-29 08:57:42 +1000 |
| commit | 0321f2d0ae6959f79f5b8a21b31694b54dbaa35d (patch) | |
| tree | 09b7472d4553325280e8889e87419735cde225a0 /tools/perf/scripts/python/bin | |
| parent | f6380e05aa92b005ac6f38be92afbdd2a0706cff (diff) | |
selftests/powerpc/pmu: Add selftest for mmcr1 pmcxsel/unit/cache fields
The testcase uses event code "0x21c040" to verify the settings for
different fields in Monitor Mode Control Register 1 (MMCR1). The fields
include PMCxSEL, PMCXCOMB PMCxUNIT, cache. Checks if these fields are
translated correctly via perf interface to MMCR1
Signed-off-by: Athira Rajeev <[email protected]>
Signed-off-by: Michael Ellerman <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions