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authorRohan G Thomas <[email protected]>2023-07-17 20:06:03 +0800
committerDavid S. Miller <[email protected]>2023-07-19 11:08:39 +0100
commit47448ff2d5c7715d9c06a27aa6d1b1f5ad1ff3db (patch)
treef94301b681e051eb43858bc975fce70427c2a583 /tools/perf/scripts/python/bin/task-analyzer-record
parentb3f937f15cd6ed789d402ba023e9b48e40e3121e (diff)
net: stmmac: xgmac: Fix L3L4 filter count
Get the exact count of L3L4 filters when the L3L4FNUM field of HW_FEATURE1 register is >= 8. If L3L4FNUM < 8, then the number of L3L4 filters supported by XGMAC is equal to L3L4FNUM. From L3L4FNUM >= 8 the number of L3L4 filters goes on like 8, 16, 32, ... Current maximum of L3L4FNUM = 10. Also, fix the XGMAC_IDDR bitmask of L3L4_ADDR_CTRL register. IDDR field starts from the 8th bit of the L3L4_ADDR_CTRL register. IDDR[3:0] indicates the type of L3L4 filter register while IDDR[8:4] indicates the filter number (0 to 31). So overall 9 bits are used for IDDR (i.e. L3L4_ADDR_CTRL[16:8]) to address the registers of all the filters. Currently, XGMAC_IDDR is GENMASK(15,8), causing issues accessing L3L4 filters above 15 for those XGMACs configured with more than 16 L3L4 filters. Signed-off-by: Rohan G Thomas <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Signed-off-by: David S. Miller <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/task-analyzer-record')
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