diff options
| author | Nikola Cornij <[email protected]> | 2019-06-25 17:19:25 -0400 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2019-07-18 14:27:25 -0500 |
| commit | d68a74541735e030dea56f72746cd26d19986f41 (patch) | |
| tree | 86e5338ef2a5c3c0d279793c73d16980794c81fa /tools/perf/scripts/python/bin/stackcollapse-report | |
| parent | e752058b8671c6c87e484cff144c5c6309a37253 (diff) | |
drm/amd/display: Clear FEC_READY shadow register if DPCD write fails
[why]
As a fail-safe, in case 'set FEC_READY' DPCD write fails, a HW shadow
register should be cleared and the internal FEC stat should be set to
'not ready'. This is to make sure HW settings will be consistent with
FEC_READY state on the RX.
Signed-off-by: Nikola Cornij <[email protected]>
Reviewed-by: Joshua Aberback <[email protected]>
Acked-by: Chris Park <[email protected]>
Acked-by: Leo Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-report')
0 files changed, 0 insertions, 0 deletions