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authorJani Nikula <[email protected]>2017-01-27 17:57:06 +0200
committerJani Nikula <[email protected]>2017-01-30 20:10:07 +0200
commitce64645d86ac5550559f3dca07fd9ba42166e196 (patch)
tree93f8009c6e8ba4deedaeb52918e338c516cdae6f /tools/perf/scripts/python/bin/stackcollapse-report
parent2355cf088d469f65d180618c24400ded38895b92 (diff)
drm/i915: use variadic macros and arrays to choose port/pipe based registers
This allows the use of more than 3 ports/pipes/whatever without tricks, even if the register offsets are not evenly spaced. There's the risk of out of bounds access if we're not careful; currently that would "just" lead to the wrong register offset being used. It might be possible to add build bug ons for build time constant indexing. We already have ports defined up to E, not sure if we might have bugs related to them and the current _PORT3() macro. text data bss dec hex filename 1239868 46199 4096 1290163 13afb3 drivers/gpu/drm/i915/i915.ko 1238828 46199 4096 1289123 13aba3 drivers/gpu/drm/i915/i915.ko Cc: Chris Wilson <[email protected]> Cc: Ville Syrjälä <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Acked-by: Daniel Vetter <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
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