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authorManivannan Sadhasivam <[email protected]>2023-03-14 13:34:32 +0530
committerBjorn Andersson <[email protected]>2023-03-15 15:17:21 -0700
commitbfe088bde391824040c39cbf277d7fe782042936 (patch)
treee50dfec432aeec24a7fa9a1fee412a1702dcbe5a /tools/perf/scripts/python/bin/stackcollapse-report
parentd0af0537e28f6eace02deed63b585396de939213 (diff)
arm64: dts: qcom: sdm845: Fix the base addresses of LLCC banks
The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. On SDM845, the size of the LLCC bank 0 needs to be reduced to 0x4500 as there are LLCC BWMON registers located after this range. Reported-by: Parikshit Pareek <[email protected]> Signed-off-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-report')
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