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authorRajendra Nayak <[email protected]>2023-12-05 11:54:01 +0530
committerBjorn Andersson <[email protected]>2023-12-07 20:26:56 -0800
commitaf16b00578a7a1d9fb99e81282b1b22cd8d32607 (patch)
tree981e5ecff04f45cca65ab46b27a39b970d5df70a /tools/perf/scripts/python/bin/stackcollapse-report
parent7a85cecf98ca175d11b7133f7c4e88bbcc0fe5d3 (diff)
arm64: dts: qcom: Add base X1E80100 dtsi and the QCP dts
Add base dtsi and QCP board (Qualcomm Compute Platform) dts file for X1E80100 SoC, describing the CPUs, GCC and RPMHCC clock controllers, geni UART, interrupt controller, TLMM, reserved memory, interconnects, SMMU and LLCC nodes. Co-developed-by: Abel Vesa <[email protected]> Signed-off-by: Abel Vesa <[email protected]> Signed-off-by: Rajendra Nayak <[email protected]> Co-developed-by: Sibi Sankar <[email protected]> Signed-off-by: Sibi Sankar <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
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