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| author | Amelie Delaunay <[email protected]> | 2021-02-08 12:46:59 +0100 |
|---|---|---|
| committer | Vinod Koul <[email protected]> | 2021-03-15 15:25:29 +0530 |
| commit | 7bc057dd65ab02995f21fa3b0f9d97261cd5aa2a (patch) | |
| tree | 6471981d71089dd55b1d97d929630753e4238a5d /tools/perf/scripts/python/bin/stackcollapse-report | |
| parent | 12810cb9c2be12b0da64d295711fa932e9836ec9 (diff) | |
phy: stm32: register usbphyc as clock provider of ck_usbo_48m clock
ck_usbo_48m is generated by usbphyc PLL and used by OTG controller
for Full-Speed use cases with dedicated Full-Speed transceiver.
ck_usbo_48m is available as soon as the PLL is enabled.
Signed-off-by: Amelie Delaunay <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-report')
0 files changed, 0 insertions, 0 deletions