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authorGayatri Kammela <[email protected]>2020-02-04 15:02:00 -0800
committerAndy Shevchenko <[email protected]>2020-02-11 15:04:43 +0200
commit7adb1e8aeeb5d4d88012568b2049599c1a247cf2 (patch)
tree999b5fe7dafb486c2051c28a3c33ed3428bf5cc8 /tools/perf/scripts/python/bin/stackcollapse-report
parent2e36ac08a98829b132a9d0bf1ca281af1a931747 (diff)
platform/x86: intel_pmc_core: Add debugfs support to access live status registers
Just like status registers, Tiger Lake has another set of 6 registers that help with status of the low power mode requirements. They are latched on every PC10 entry/exit and S0ix.y entry/exit as well. Though status and live status registers show the status of same list of requirements, live status registers show the status of the low power mode requirements at the time of reading. Cc: Srinivas Pandruvada <[email protected]> Cc: Andy Shevchenko <[email protected]> Cc: David E. Box <[email protected]> Signed-off-by: Gayatri Kammela <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
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